Hello world

A simple example will get us started. We use a classical "Hello, world'' example, which will do nothing meaningful except printing a text string. The code for the example is shown in Figure 1. The code for the example is from the Icarus Verilog User Guide. We will start using Icarus Verilog in Section Getting some tools.

module main;

initial
  begin
    $display("Hello, world");
    $finish;
  end

endmodule

Figure 1. A hello world example in Verilog.

This the Verilog view - other views are VHDL - SystemC-TLM

The code in Figure 1 contains a module, which is named main.

An initial block is used, for the purpose of defining the behavior of the module. The block contains a statement for displaying a string, and a statement for finishing the simulation.

We remark that the code in Figure 1 generates an artificial, simulated behavior. It does not provide any code that can be used for synthesizing actual hardware.

You can read about Verilog in Wikipedia, and at other places, such as Doulos, who provides this Verilog Designer's Guide.