Choosing a language

We choose to describe our computer using a language. In this way, we can have a textual representation of the computer, and we can use the textual representation as input to software tools, that will help us to simulate the behavior of our computer.

Verilog is a hardware description language. We use Verilog to describe our computer, and to simulate its functionality. It is also possible to use Verilog to actually synthesize a computer, in real hardware, for example in an FPGA.

Verilog is standardized by IEEE.

Information about Verilog can be found e.g. from Doulos.