Build and Run

The register in Figure 6 and a testbench, with code as shown in in Section A testbench, can be built and run.

A makefile can be created. The makefile can contain commands for building and running the register and the testbench. A makefile is shown in Figure 7.

OBJS := n_bit_register.o n_bit_register_tb.o

n_bit_register_tb: $(OBJS)
	ghdl -e $@

%.o: %.vhdl
	ghdl -a $<

.PHONY: clean

clean: 
	rm n_bit_register_tb $(OBJS) e~n_bit_register_tb.o \
	work-obj93.cf

Figure 7. A makefile for building and running the register in Figure 6.

This the VHDL view - other views are Verilog - SystemC-TLM

It can be seen, in the makefile in Figure 7, that the ghdl command is used, in the same way as described in Section Build and run in Chapter Storing one bit.

Assume the register is stored in a file named n_bit_register.vhdl, and the testbench is stored in a file named n_bit_register_tb.vhdl. Running the makefile, by giving the command make results in printouts, as

$ make
ghdl -a n_bit_register.vhdl
ghdl -a n_bit_register_tb.vhdl
ghdl -e n_bit_register_tb

A script file can be created, and used for running the simulated register and the testbench. Using a script file named run.sh, with contents as

#!/bin/bash

ghdl -r n_bit_register_tb --vcd=n_bit_register_tb_wave_vhdl.vcd

for running the simulation, gives the result as shown in Figure 8.

$ ./run.sh 
n_bit_register_tb.vhdl:110:8:@0ms:(report note): data_in=0001, data_out=UUUU
n_bit_register_tb.vhdl:110:8:@4ns:(report note): data_in=0010, data_out=0001
n_bit_register_tb.vhdl:110:8:@8ns:(report note): data_in=0011, data_out=0010
n_bit_register_tb.vhdl:110:8:@12ns:(report note): data_in=0100, data_out=0011
n_bit_register_tb.vhdl:110:8:@16ns:(report note): data_in=0101, data_out=0100

Figure 8. Printouts from a simulation of the register in Figure TBD.

This the VHDL view - other views are Verilog - SystemC-TLM

We can generate waveforms, in the same way as described in Section TBD. The resulting waveform, for the register with printouts as shown above, is displayed in Figure 9.

Figure 9. Waveforms from a simulation with printouts as shown in Figure TBD.